US Patent No.  7,219,241 - Prepared by Attorney David Tran for Intel Corporation and filed by Intel Corporation

Brief Description:   For one embodiment, the logical physical processors 105 and 110 illustrated in FIG. 1 may support system management mode (SMM) for power management. SMM provides an environment for executing power management software routines or handlers that do not interfere with the OS or application programs. SMM may be entered by generating an SMI service request (referred to herein as SMI) using hardware or software. For example, when an SMI is sent to the logical processor 105, the logical processor 105 enters SMM and executes a SMM software routine in SMRAM address space to service the request associated with the SMI. An SMRAM address space is a memory address space that may be separate from the memory 130. The SMRAM address space may be provided on the physical processor 100 and may be used for storage and execution of SMM software routines. The SMRAM address space may be distinct from the memory 130 to ensure that the software routines running in SMM do not conflict with the OS or application software. SMM is known to one skilled in the art.  For one embodiment, in a processor that supports multiple logical processors (e.g., processors that support HT such as the processor 100 illustrated in FIG. 1), when a SMI is generated, both logical processors 105 and 110 may enter the SMM regardless of which of the logical processors 105 and 110 the SMI is sent to. The logical processors 105 and 110 may share the same SMRAM but may use a different area of SMRAM. For example, when the OS requires service from a software routine in the SMRAM associated with the logical processor 105, the OS may cause a SMI to be sent to the logical processor 105. OS execution may then be suspended. The logical processor 105 may then enter SMM. The logical processor 110 may also enter SMM. The logical processor 105 may then execute a software routine corresponding to the SMI in its SMRAM to service the request. The logical processor 105 may then exit the SMM. Exit from the SMM may be performed when the logical processor 105 executes a RSM (Resume) instruction. The logical processor 110 may also exit from the SMM. The OS execution may then continue.